Logical simulation model generation system

Abstract

PURPOSE: To execute a logical operation once when the same logical operation exists in fan-in information of different logical variables so as to speed up logical simulation. CONSTITUTION: A connection information generation procedure 1 generates fan-in information and fan-out information for respective logical variables included in a logical circuit from the inputted logical circuit. A same logical operation extraction procedure 2 sequentially checks fine-in information for respective generated logical variables and retrieves whether the equal logical operation exists or not, whereby it outputs it. A temporary logical variable number setting procedure 3 sets the logical variable obtained in the extracted logical operation as the new temporary logical variable. A fan-in information alteration procedure 4 exchanges the original logical expression of the extracted logical operation with the temporary logical variable and alters fan-in information. A fan-out information alteration procedure 5 exchanges the original logical variable having extracted fan-in information with the temporary logical variable among fan-out information of the logical variable included in extracted fan-in information. COPYRIGHT: (C)1992,JPO&Japio

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